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Kimura Lab
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A lab on design verification, which shows that system LSI designs are correct.
AboutAbout the lab
How do you show that a designed LSI is correct?
Kimura Lab studies the design of system LSIs and the verification that checks their correctness.
Verification is the work of showing that what you have designed is truly correct.
Making an LSI takes a large cost and a long time, so its correctness must be shown at the design stage.
The lab works on both building circuits that are fast, small in area, and low in power consumption, and automatically showing that their designs contain no errors.
Key terms
- System LSI
- An integrated circuit that packs several functions, such as computation and memory, onto a single chip.
- High-level synthesis
- A technology that automatically generates the structure of a circuit from a program written in a language such as C.
- Approximate computing
- An approach that tolerates small errors in the results in exchange for faster computation and lower power use.
ResearchResearch themes
The lab studies the design and verification of system LSIs that are fast, small in area, and low in power consumption. It is distinguished by its techniques for showing correctness, such as formal design verification, which shows mathematically that a design is correct, and timing verification, which focuses on how a circuit behaves over time.
*Illustrative imageHigh-Level Design and Verification
The lab works on design methods based on the C language, optimization of bit widths in high-level synthesis, and high-level verification using equivalence checking. It applies techniques for handling logic functions, such as BDDs and SAT.
*Illustrative imageReconfigurable Hardware
This research optimizes application systems using hardware whose circuit contents can be rearranged either without stopping its operation or before it is run.
*Illustrative imageApproximate Computing Circuits
The lab studies design methods for circuits based on approximate computing, such as treating 303×209 as 300×200, to reduce power consumption, and ways to implement CNNs with such approximate circuits.
*Illustrative imageQuantum Computing Algorithms
The lab studies methods for solving combinatorial optimization problems using quantum annealing, and their applications.
MembersFaculty
- ProfessorShinji Kimura
VoicesStudent voices
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Report an errorAbout the images
The top and research theme images are illustrative and were not taken at the lab. They are cropped from Wikimedia Commons images. Cropped CC BY-SA images are provided under the same CC BY-SA license as the original (version shown on each line).
- Top image: “1645RT2U-HD” ZeptoBars / CC BY 3.0 (cropped)
- High-Level Design and Verification: “0, PIHIN20A 220RR VJ MLT22621” Epop / CC0 (cropped)
- Reconfigurable Hardware: “FPGA chip die (Xilinx XC )” htomari / CC BY-SA 2.0 (cropped)
- Approximate Computing Circuits: “Artificial Neural Network with Chip” mikemacmarketing / photo on flickr / CC BY 2.0 (cropped)
- Quantum Computing Algorithms: “QubitMechanicalResonator” Erik Lucero, Martinis Group, University of California, Santa Barbara / CC BY-SA 3.0 (cropped)
- Related lab (Tanzawa Lab): “TI AHC08 Die Shot (4x2-Input AND Gate)” Cole L / CC BY-SA 2.0 (cropped)
- Related lab (Ikehashi Lab): “Microstructure1234” Denis Elbl, KIT / CC BY-SA 4.0 (cropped)
- Related lab (Yoshimasu Lab): “Compact AIS antenna” ESA – G. Porter / CC BY-SA 3.0 (cropped)
- Related lab (Yamasaki Lab): “Steel truss bridge in Brazil” Henri Bergius from Finland / CC BY-SA 2.0 (cropped)
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