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Nakahara Lab
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A lab that implements AI on rewritable LSIs, or FPGAs.

AboutAbout the lab
Running AI fast on rewritable LSIs
The Nakahara Lab studies reconfigurable systems, which are LSIs that can be rewritten.
Focusing on FPGAs in particular, it works on how to implement and apply AI, as well as high-performance computing.
A distinctive feature is that it covers a wide range, from LSI design and verification to applications and theoretical architectures.
Besides publishing its results in papers, the lab also links them to business use through a venture company.
Key terms
- FPGA
- An integrated circuit whose internal circuitry can be rewritten after it is made, so the design can be changed to suit the purpose
- Reconfigurable system
- A computing system whose circuit configuration can be rearranged after the fact
- Accelerator
- Dedicated hardware prepared to process only a specific kind of computation quickly
ResearchResearch themes
The lab works on design methods and application examples for reconfigurable systems, which are rewritable LSIs, especially FPGAs. In recent years it has been advancing research and development on AI accelerators, high-performance computers that use FPGAs, and new FPGAs.
*Illustrative imageAI accelerators
The lab researches and develops methods for implementing accelerators that process deep learning quickly on FPGAs. It has produced pioneering results in lightweight AI models and dedicated hardware.
*Illustrative imageHigh-performance computing with FPGAs
Data centers need faster computation, and opportunities to use FPGAs are increasing. The lab is building accelerators and clusters that speed up deep learning training together with groups at RIKEN and the School of Computing.
*Illustrative imageNew FPGA architectures
As the end of Moore's law is being discussed, the lab researches and develops LSIs with structures different from conventional ones. This project also includes the development of open EDA tools such as OpenLANE.
*Illustrative imageMultiple-valued logic (MVL)
Most of today's VLSI is designed with binary values, but representing information with multiple values may make it possible to realize more efficient VLSI. This is a theory-oriented topic with a lot of mathematical content.
MembersFaculty
The members of the Nakahara Lab consist of faculty, doctoral, master's, and undergraduate students, and a secretary.As of 2023
- Program-Specific ProfessorHiroki Nakahara
VoicesStudent voices
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Report an errorAbout the images
The top and research theme images are illustrative and were not taken at the lab. They are cropped from Wikimedia Commons images. Cropped CC BY-SA images are provided under the same CC BY-SA license as the original (version shown on each line).
- Top image: “NASA to Test Solution for Radiation-Tolerant Computing in Space (FPGA Board Rev )” NASA Marshall Space Flight Center / NASA/Firefly Aerospace / Public domain (cropped)
- AI accelerators: “Artificial Neural Network with Chip” mikemacmarketing / photo on flickr / CC BY 2.0 (cropped)
- High-performance computing with FPGAs: “BalticServers data center” BalticServers.com / CC BY-SA 3.0 (cropped)
- New FPGA architectures: “Multicrystalline silicon wafer with thin film iridescence” Radiotrefoil / CC BY-SA 4.0 (cropped)
- Multiple-valued logic (MVL): “Sipeed Tang Nano 9K FPGA” Popolon / CC0 (cropped)
- Related lab (Thiem研究室): “Circuit Board closeup ( )” Dennis van Zuijlekom / CC BY-SA 2.0 (cropped)
- Related lab (高橋研究室): “SAB1012F die” Mister rf / CC BY-SA 4.0 (cropped)
- Related lab (篠﨑研究室): “Human voice spectrogram” Dvortygirl, Mysid / CC BY-SA 3.0 (cropped)
- Related lab (西尾研究室): “Passive Millimeter Wave Camera (PMMWC) at TRW - GPN” Northrop Grumman Space Technology - Redondo Beach (formerly TRW, Inc)/TRW photographer / Public domain (cropped)
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