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Thiem Lab
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The lab works on running machine learning efficiently through computer architecture and FPGAs.
AboutAbout the lab
Efficient machine learning, starting from computer architecture.
The Thiem Lab studies computer architecture and reconfigurable computing using FPGAs.
The lab deals with the inner workings of computers themselves, as well as the algorithms and hardware for running machine learning.
Recently, the lab has been working on ways to run machine learning efficiently and on processing sparse data.
Key terms
- Computer architecture
- The field of designing how the inside of a computer is assembled and made to run
- FPGA
- An integrated circuit whose internal circuitry can be rewritten after it is made, so the design can be changed to suit the application
- Reconfigurable computing
- An approach to computation in which the circuit configuration is rearranged to suit the purpose while computing
NewsLab news
A student won the Poster Award at ASP-DAC 2025
A master's student won the Outstanding Student Award of the Department of Information and Communications Engineering, School of Engineering
A student won the IEICE VLD Student Author Award
ResearchResearch themes
The lab studies computer architecture, FPGAs and reconfigurable computing, systems, and machine learning. Recently, it has been working on efficient algorithms and hardware for machine learning, and on processing sparse data.
*Illustrative imageComputing sparse matrices quickly
In machine learning and graph computation, there are many cases where matrices in which most values are zero ("sparse" matrices) are multiplied together. The lab designs dataflows that skip the zeros and avoid wasted computation, and designs dedicated circuits that run on FPGAs and similar hardware.
*Illustrative imageMachine learning that works well on small tabular data
To make accurate predictions even from tabular data with few samples, the lab builds models that combine decision trees and neural networks. It also studies training methods whose explanations of decisions change little even when the model is retrained.
*Illustrative imageEstimating one's own position on an FPGA
The lab designs circuits that run, quickly and with low power on an FPGA, the processing by which robots and drones estimate their own motion from the images of two cameras. It devises ways to manage maps and match features efficiently inside the chip.
MembersFaculty
- Associate ProfessorThiem Van Chu
VoicesStudent voices
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Report an errorAbout the images
The top and research theme images are illustrative and were not taken at the lab. They are cropped from Wikimedia Commons images. Cropped CC BY-SA images are provided under the same CC BY-SA license as the original (version shown on each line).
- Top image: “Circuit Board closeup ( )” Dennis van Zuijlekom / CC BY-SA 2.0 (cropped)
- Computing sparse matrices quickly: “Operational ( )” Billie Grace Ward from New York, USA / CC BY 2.0 (cropped)
- Machine learning that works well on small tabular data: “Decision tree model” T-kita at English Wikipedia / Public domain (cropped)
- Estimating one's own position on an FPGA: “Feature Detection and Tracking by Mars Helicopter” NASA/JPL-CalTech / Public domain (cropped)
- Related lab (本村・藤木研究室): “Freescale MPC8245 integrated processor die shot” Martijn Boer / Public domain (cropped)
- Related lab (佐々
木研究室): “Intel-pentium-ii-dixon-die-shot-high-resolution-stitched” Martijn Boer / Public domain (cropped) - Related lab (中原研究室): “NASA to Test Solution for Radiation-Tolerant Computing in Space (FPGA Board Rev )” NASA Marshall Space Flight Center / NASA/Firefly Aerospace / Public domain (cropped)
- Related lab (一色研究室): “Circuit image on Rubylith” Camera Operator: TSGT Bob Wickley / Public domain (cropped)
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