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Takahashi Lab
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A lab that develops algorithms to automate the design of integrated circuits.
AboutAbout the lab
Toward high-performance VLSI design systems.
Takahashi Lab studies techniques for automating the design of VLSI (very large-scale integrated circuits), especially the automation of physical design.
As circuits continue to shrink, how circuits are placed and wired on a chip has come to have a major effect on their performance.
The lab's research centers on physical design problems such as clock design, floorplanning, placement, routing, and packaging.
The ultimate goal is to build more practical, high-performance VLSI design systems.
Key terms
- VLSI
- An integrated circuit that packs a very large number of transistors onto a single chip
- Physical design
- The design step that decides where to place circuit components on a chip and how to connect them with wiring. Also called layout design
- Lithography
- A technology that uses light to print fine circuit patterns onto a wafer (a thin circular disk of semiconductor)
NewsLab news
A lab presentation won the FY2025 VLD (VLSI Design Technologies) Technical Committee Outstanding Technical Report Award
A lab presentation won the FY2024 VLD (VLSI Design Technologies) Technical Committee Outstanding Technical Report Award
A lab presentation won the Outstanding Poster Presentation Award at the Design Automation Symposium 2025
A master's student won the Session Special Award at the Design Automation Symposium 2024
A student won an Outstanding Presentation Award and a Session Special Award at the Technical Committee on System and LSI Design Methodology
ResearchResearch themes
Aiming at high-performance automation of VLSI design, especially physical design, the lab works on new design methodologies for synchronous circuits. Its research ranges from routing algorithms to design techniques for next-generation lithography.
*Illustrative imagePhysical design for next-generation lithography
This research coordinates design techniques with next-generation lithography, which forms fine circuit patterns on wafers. The aim is to build practical design flows that make effective use of techniques such as multiple exposure.
*Illustrative imageSynchronous circuit design with a new approach to clock distribution
The lab studies a new design methodology for synchronous circuits that does not assume the clock is delivered to every element at the same time. Key challenges are shortening the clock period and reducing the cost of clock distribution and peak power.
*Illustrative imageVariable-latency circuits that adapt to delay variation
As circuits shrink, variation in signal delay is growing. Based on schemes that detect and recover from errors, the lab aims to realize high-performance circuits that change their operation according to changes in delay.
*Illustrative imageRouting for printed circuit boards and packages
Routing for printed circuit boards and packages is still often designed by hand. The lab develops routing algorithms that incorporate the know-how of manual design and satisfy a variety of requirements, such as shortest-length routing and length-matched routing.
MembersFaculty
The members of Takahashi Lab are faculty, secretaries, researchers, and doctoral, master's, and undergraduate students.As of 2024
- ProfessorAtsushi Takahashi
- Assistant ProfessorSatoshi TayuPublications ↗
- Assistant ProfessorMasayuki ShimodaPublications ↗
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Report an errorAbout the images
The top and research theme images are illustrative and were not taken at the lab. They are cropped from Wikimedia Commons images. Cropped CC BY-SA images are provided under the same CC BY-SA license as the original (version shown on each line).
- Top image: “SAB1012F die” Mister rf / CC BY-SA 4.0 (cropped)
- Physical design for next-generation lithography: “Diffracted Light Spectrum on Patterned Silicon Wafer” DrHughManning / CC BY-SA 4.0 (cropped)
- Synchronous circuit design with a new approach to clock distribution: “Vein skeleton of a leaf (de-ghosted)” Brocken Inaglory / CC BY-SA 3.0 (cropped)
- Variable-latency circuits that adapt to delay variation: “Snowflake macro (Unsplash)” Aaron Burden / CC0 (cropped)
- Routing for printed circuit boards and packages: “Blue PCB Decoration in Zhichunli Station (close-up)” Franklsf95 / CC BY-SA 3.0 (cropped)
- Related lab (山口研究室): “Hologram by Ken Harris, 2012 Switzerland” Harris, Ken / CC BY-SA 4.0 (cropped)
- Related lab (中原研究室): “NASA to Test Solution for Radiation-Tolerant Computing in Space (FPGA Board Rev )” NASA Marshall Space Flight Center / NASA/Firefly Aerospace / Public domain (cropped)
- Related lab (永井研究室): “Grey square optical illusion line” Sakurambo / Public domain (cropped)
- Related lab (Thiem研究室): “Circuit Board closeup ( )” Dennis van Zuijlekom / CC BY-SA 2.0 (cropped)
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