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Integrated Architecture Lab
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The lab co-designs software and hardware to build highly efficient LSI.
AboutAbout the lab
Beyond Moore's Law, embedding intelligence in circuits
The Integrated Architecture Lab studies integrated circuit technology for continuing to process information with high efficiency even after the end of Moore's Law.
Taking the approach of designing software and hardware together, the lab works on cutting-edge architecture technology and system-oriented integrated circuit technology.
Together with the Integrated Nanosystems Lab, it forms the Advanced LSI Engineering research group (LALSIE), promoting industry-academia and inter-university collaboration.
Students interested in LSI design or system design are welcome.
Key terms
- LSI
- An integrated circuit that packs many transistors onto a single chip
- Architecture
- The structural framework of a computer's design, determining which components handle which parts of a computation and how
- Edge AI
- A approach in which AI computation is performed inside a device at hand, without sending data to the cloud
NewsLab news
A paper by Prof. Marukame and colleagues was published in Engineering Research Express
A master's student received an Encouragement Award at the International Symposium on Neuromorphic AI Hardware
A paper by Prof. Akinaga and colleagues was published in Nanomaterials
ResearchResearch themes
The lab aims to go beyond the end of Moore's Law and open up computing based on new principles. By designing software and hardware together, it studies low-power inference mechanisms and the LSI architectures that run them.
*Illustrative imageEdge AI and Lightweight Inference
The lab works on binary Bayesian neural networks, stochastic in-memory computing, and privacy-preserving federated learning. It implements extremely low-power edge inference and architectures that learn on the device itself.
*Illustrative imageVLSI Architecture Design
The lab handles everything from design to chip fabrication for CNN accelerators based on coarse-grained reconfigurable architectures (CGRA) with adjustable degrees of parallelism, memory-centric neural network processors, and deep reinforcement learning engines for hardware.
MembersFaculty
The members of the Integrated Architecture Lab are faculty members, technical staff, administrative assistants, and doctoral, master's, and undergraduate students.As of 2026
- ProfessorTakao Marukame
- ProfessorHiroyuki Akinaga
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Report an errorAbout the images
The top and research theme images are illustrative and were not taken at the lab. They are cropped from Wikimedia Commons images. Cropped CC BY-SA images are provided under the same CC BY-SA license as the original (version shown on each line).
- Top image: “A semiconductor wafer being removed from processing equipment” YouTube — Purdue Engineering / CC BY 4.0 (cropped)
- Edge AI and Lightweight Inference: “Labyrinthine circuit board lines - Flickr - quapan” quapan / CC BY 2.0 (cropped)
- VLSI Architecture Design: “ULN2003 Darlington Transistor Array Micrograph” Zeptobars.ru / CC BY 3.0 (cropped)
- Related lab (Integrated Nanosystems Lab): “Нейрон коры с множеством дендритных шипиков” Sergb95 / CC BY-SA 4.0 (cropped)
- Related lab (Nanoelectronic Devices Lab): “CMOS magnetische Blasendomänen” Matesy GmbH / CC BY-SA 3.0 (cropped)
- Related lab (Photonic Information and Life Science Lab): “FluorescentCells” 作者不詳 / Public domain (cropped)
- Related lab (Integrated Electronic Devices Lab): “Gold Nano Anchors Put Nanowires in Their Place ( )” National Institute of Standards and Technology / Public domain (cropped)
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