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トープラサートポン研究室
Showing the original Japanese · View translation
強誘電体などをシリコンに組み込み、省エネの次世代トランジスタをつくる研究室。
AboutAbout the lab
AI・IoT時代を支える、次世代の半導体デバイス。
トープラサートポン研究室は、
半導体の
シリコンの
Key terms
- 強誘電体
- 電圧を
かけると 電気の 偏り （分極）の 向きが 変わり、 電圧を 切っても その 向きが 残る 材料 - リザバーコンピューティング
- 入力を
複雑に 変化させる 「貯水池」の 部分と、 学習する 出力部分に 分けて 計算する AIの 方法。 学習が 軽い - CMOS
- コンピュータの
チップの 多くに 使われている、 2種類の トランジスタを 組み合わせた回路の 方式
NewsLab news
トープラサートポン准教授らが、
第17回シリコンテクノロジー分科会論文賞を 受賞 学生が、
第24回IEEE EDS Japan Joint Chapter Student Award を 受賞 学生が、
2025 IWDTF Young Researcher Award を 受賞 学生が、
SSDM Best Student Award を 受賞 トープラサートポン准教授らが、
第16回シリコンテクノロジー分科会論文賞を 受賞
ResearchResearch themes
半導体の
*Illustrative image強誘電体トランジスタとメモリ
HfZrO2などの
*Illustrative image強誘電体でつくるAIのハードウェア
計算の
*Illustrative image量子コンピュータのための極低温CMOS
量子ビットを
MembersFaculty
トープラサートポン研究室の
- Associate Professorトープラサートポン カシディットPublications ↗
VoicesStudent voices
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Report an errorAbout the images
The top and research theme images are illustrative and were not taken at the lab. They are cropped from Wikimedia Commons images. Cropped CC BY-SA images are provided under the same CC BY-SA license as the original (version shown on each line).
- Top image: “Ferroelectric domains at a PZT grain boundary ( )” Oak Ridge National Laboratory / CC BY 2.0 (cropped)
- 強誘電体トランジスタと
メモリ: “Hafnium(IV)-oxide-3D-polyhedra” Hoa112008 / Public domain (cropped) - 強誘電体で
つくる AIの ハードウェア: “Neuromorphic Nanowire Network Chip Wirebonded to Chip Carrier” DrHughManning / CC BY-SA 4.0 (cropped) - 量子コンピュータの
ための 極低温CMOS: “Desert Cryogenics probe station” Moxfyre / CC BY-SA 4.0 (cropped) - Related lab (田中・
大矢・中根・アイン研究室): “Molecular-beam epitaxy system at LAAS 0514” Guillaume Paumier (user:guillom) / CC BY-SA 3.0 (cropped) - Related lab (横田研究室): “Strain gauge” Cristian V. / CC BY 4.0 (cropped)
- Related lab (染谷・神保研究室): “Stretchable Electronics” Steve Jurvetson from Menlo Park, USA / CC BY 2.0 (cropped)
- Related lab (前田研究室): “Self-etched nitride MOCVD film” Evavilova / CC BY-SA 4.0 (cropped)
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