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再構成可能システム学
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FPGAなどの再構成可能なLSIでAIを速く動かす計算機を作る研究室。

AboutAbout the lab
再構成可能なLSIで、AIの計算を速くする。
再構成可能システム学研究室は、
特に
多数の
研究成果は
Key terms
- FPGA
- 使う
人が 後から 回路の 構成を 書き換えられる LSI。 - アクセラレータ
- 特定の
処理を 速く 行う ために 作られた 専用の 回路や 装置 - 深層学習
- 多層の
ニューラルネットワークで データの 特徴を 学ぶ、 AIの 手法の 一つ。 - ムーアの
法則 - 半導体チップの
回路の 集積度が、 一定の 期間ごとに 倍に なっていくと いう 経験則
ResearchResearch themes
再構成可能な
*Illustrative image深層学習を速く動かす回路
深層学習
*Illustrative image新構造のFPGAの研究開発
ムーアの
*Illustrative imageFPGAによる高性能計算
クラウドなどの
*Illustrative image多値表現を使った効率的なLSI
ほぼ大多数の
MembersFaculty
再構成可能システム学研究室の
- Professor中原 啓貴
VoicesStudent voices
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コミュニケーション論情報科学研究科 情報基礎科学専攻IoT社会を
ワイヤレスネットワーク学情報科学研究科 情報基礎科学専攻つながるThe information on this page is compiled by the LabLog team from the lab's public information and interviews. For corrections or removal requests, please contact LabLog, not the lab.
Report an errorAbout the images
The top and research theme images are illustrative and were not taken at the lab. They are cropped from Wikimedia Commons images. Cropped CC BY-SA images are provided under the same CC BY-SA license as the original (version shown on each line).
- Top image: “TEI0001 Altera MAX 10 FPGA MAX1000 IoT Maker Board” Antti Lukats / CC0 (cropped)
- 深層学習を
速く 動かす回路: “DARPA SyNAPSE 16 Chip Board” DARPA SyNAPSE / Public domain (cropped) - 新構造の
FPGAの 研究開発: “Plessey Semiconductor (Ferranti) ULA 2C200J Die Photograph” Revaldinho / CC BY 4.0 (cropped) - FPGAに
よる 高性能計算: “Dutch national supercomputer "Huygens"” Dennis van Zuijlekom / CC BY-SA 2.0 (cropped) - 多値表現を
使った 効率的な LSI: “74LS08 AND Gate DIL Chip” RetroEditor / CC BY 4.0 (cropped) - Related lab (知能集積システム学): “TEI0001 Altera MAX 10 FPGA MAX1000 IoT Maker Board top view” Antti Lukats / CC0 (cropped)
- Related lab (コミュニケーション論): “Google's First Production Server (1999) detail of networking - Computer History Museum ( by Carlo Nardone)” Carlo Nardone from Roma, Italy / CC BY-SA 2.0 (cropped)
- Related lab (ワイヤレスネットワーク学): “RouterBoard R52 miniPCI Wi-Fi card with U.FL-RSMA pigtail” Kozuch / CC BY-SA 4.0 (cropped)
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