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Kosuge Lab (Klab)
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A lab tackling AI's power consumption problem with brain-inspired chips and 3D integration.
AboutAbout the lab
Next-generation integrated circuits to advance AI processing
The Kosuge Lab researches next-generation 3D chip integration technology and low-power circuit design technology for AI processing.
While AI enriches society, it requires enormous computing resources, and rising power consumption has become a challenge.
To solve this problem, the lab develops hardwired-logic processors modeled on the human cerebrum, as well as 3D packaging technology that stacks chips.
The lab also uses AI in chip packaging technology, software, and semiconductor design, pursuing the full potential of semiconductors.
Key terms
- Hardwired-logic processor
- A processor that builds the computation itself into the circuit as wiring, reducing data exchange with memory
- Neural network
- A computational mechanism modeled on the connections between neurons in the brain. It is the foundation of current AI technology
- 3D integration
- A technology that stacks multiple semiconductor chips vertically and connects them with short wires
NewsLab news
A doctoral student was selected as a Best Student Paper Award Finalist at VLSI Symposium 2026
Associate Professor Kosuge received the Telecommunications Advancement Foundation Award for Encouragement
Results of joint research with TSMC on an AI processor were accepted by IEEE Transactions on Circuits and Systems-I
A paper by a doctoral student on a low-cost AI processor was published in OJCAS
A web page for students preparing for lab assignment and for prospective applicants has been published
ResearchResearch themes
The lab aims to reduce power consumption by three or more orders of magnitude with next-generation integrated circuits specialized for AI processing (Beyond IC). To that end, it researches hardwired-logic processors and 3D integration technology.
*Illustrative imageBrain-Inspired Low-Power AI Processors
The lab co-designs neural network models and semiconductor circuits to develop power-efficient AI processors. Through discussions with neuroscience researchers, it mimics features of the cerebrum, aiming for power consumption 1/1000 that of conventional processors and for AI processors that can be implanted in the body.
*Illustrative image3D Integration by Stacking Chips
This technology builds many high-density, low-power signal wires into a cube of stacked memory and processor chips, enabling advanced AI processing in a single cube. The lab aims to realize, at palm size, AI models that previously required a supercomputer.
MembersFaculty
The members of the Kosuge Lab are faculty, secretaries, and doctoral, master's, and undergraduate students.As of 2026
- Associate ProfessorAtsutake KosugePublications ↗
- Project Professor濱田 基嗣
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Report an errorAbout the images
The top and research theme images are illustrative and were not taken at the lab. They are cropped from Wikimedia Commons images. Cropped CC BY-SA images are provided under the same CC BY-SA license as the original (version shown on each line).
- Top image: “Intel@14nm@Skylake@Skylake-SP(XCC)@Xeon(ES)@QJW5 DSCx8 poly@20x - Flickr - FritzchensFritz” Fritzchens Fritz from Berlin / CC0 (cropped)
- Brain-Inspired Low-Power AI Processors: “Neuromorphic Nanowire Network Chip Wirebonded to Chip Carrier” DrHughManning / CC BY-SA 4.0 (cropped)
- 3D Integration by Stacking Chips: “Stacked Turing Chips TU104 TU106 TU116 DSC08577-DSC )” Fritzchens Fritz from Berlin / CC0 (cropped)
- Related lab (Iizuka Lab): “07R01” Mister rf / CC BY-SA 4.0 (cropped)
- Related lab (Ikeda Lab): “Silicon chip from a computer laser mouse under a microscope 50х” Original: Alexander Klepnev Derivative work: IamMM / CC BY-SA 4.0 (cropped)
- Related lab (Irie-Kadomoto Lab): “12-inch silicon wafer” Peellden / CC BY-SA 3.0 (cropped)
- Related lab (Takeuchi Lab): “Datacenter Server Racks ( )” Carl Lender / CC BY 2.0 (cropped)
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